MOSFET

The metal–oxide–semiconductor field-effect transistor (MOSFET, MOS-FET, or MOS FET), also known as the metal–oxide–silicon transistor (MOS transistor, or MOS), is a type of  (IGFET) that is  by the  of a, typically. The voltage of the determines the  of the device; this ability to change conductivity with the amount of applied voltage can be used for  or  electronic. The MOSFET was invented by Egyptian engineer and Korean engineer  at  in November 1959. It is the basic building block of modern, and the in history, with an estimated total of 13 (1.3 × 1022) MOSFETs manufactured between 1960 and 2018.

The MOSFET is the most common in  and, and the most common. It was the first truly compact that could be miniaturised and mass-produced for a, revolutionizing the  and the , having been central to the , , ,  and. and miniaturization has been driving the rapid exponential growth of electronic semiconductor technology since the 1960s, and enable  (ICs) such as s and. The MOSFET is considered to be possibly the most important invention in electronics, as the "workhorse" of the electronics industry and the "base technology" of the late 20th to early 21st centuries, and for having revolutionized modern culture, economy and society across the world.

A key advantage of a MOSFET is that it requires almost no input current to control the load current, when compared with (BJTs). In an  MOSFET, voltage applied to the gate terminal can increase the conductivity from the "normally off" state. In a  MOSFET, voltage applied at the gate can reduce the conductivity from the "normally on" state. MOSFETs are also capable of ( and ), with increasing miniaturisation, and can be easily scaled down to smaller dimensions. They also have faster switching speed, consume much less power, and allow higher density, than bipolar transistors. The MOSFET is also cheaper and has relatively simple processing steps, resulting in a high.

MOSFETs can either be manufactured as part of chips, or as discrete MOSFET devices (such as a ). Since MOSFETs can be made with either or  ( or, respectively), complementary pairs of MOSFETs can be used to make switching circuits with very low , in the form of  (CMOS) logic. By the 1970s–1980s, CMOS logic consumed over times less power than NMOS logic, and about 100,000 times less power than bipolar (TTL). The name "metal–oxide–semiconductor" (MOS) typically refers to a, , and semiconductor (typically silicon). However, the "" in the name MOSFET is sometimes a, because the gate material can also be a layer of (polycrystalline silicon). Along with, different materials can also be used with the aim of obtaining strong channels with smaller applied voltages. The is also part of the MOSFET structure.

Background
The basic principle of the (FET) was first proposed by Austro-Hungarian physicist  in 1925. However, his early FET concept was not a practical design. The FET concept was later also theorized by in the 1930s and  in the 1940s, but there was no working practical FET built at the time. Shockley's research team initially attempted to build a working FET, by trying to modulate the conductivity of a, but they were unsuccessful, mainly due to problems with the , the , and the and  compound materials. In the course of trying to understand the mysterious reasons behind their failure to build a working FET, this led two members of Shockley's team, and, to instead build a , the first working transistor, in 1947, which was followed by Shockley's  (BJT) in 1948. None of these early FET proposals involved, which later made the MOS transistor possible.

Semiconductor companies initially focused on s in the early years of the. However, the junction transistor was a relatively bulky device that was difficult to manufacture on a basis, which limited it to a number of specialised applications. FETs were theorized as potential alternatives to junction transistors, but researchers were unable to build practical FETs, largely due to the troublesome surface state barrier that prevented the external from penetrating into the material. By the 1950s, researchers had largely given up on the FET concept, and instead focused on BJT technology.

Invention
A breakthrough came with the work of Egyptian engineer in the late 1950s. He investigated the surface properties of silicon semiconductors at, where he adopted a new method of , coating a with an insulating layer of , so that electricity could reliably penetrate to the conducting silicon below, overcoming the surface states that prevented electricity from reaching the semiconducting layer. This is known as, a method that later became critical to the as it made possible the mass-production of silicon semiconductor technology, such as  (IC) chips. For the surface passivation process, he developed the method of, which was a breakthrough in silicon semiconductor technology. The surface passivation method, which substantially reduced the influence of the dangling bond that had prevented Shockley's research team from building a working FET, was presented by Atalla in 1957. Building on the surface passivation method, Atalla developed the metal–oxide–semiconductor (MOS) process, with the use of thermally oxidized silicon. He proposed that the MOS process could be used to build the first working silicon FET, which he began working on building with the help of Korean recruit.

The MOSFET was invented by Mohamed Atalla and Dawon Kahng in 1959. They the device in November 1959, and presented it as the "silicon–silicon dioxide field induced surface device" in early 1960, at the Solid-State Device Conference held at. The device is covered by two, each filed separately by Atalla and Kahng in March 1960. Operationally and structurally different from the, the MOSFET was made by putting an insulating layer on the surface of the semiconductor and then placing a metallic gate electrode on that. It used crystalline silicon for the semiconductor and a layer of  for the insulator. The silicon MOSFET did not generate localized electron traps at the interface between the silicon and its native oxide layer, and thus was inherently free from the trapping and scattering of carriers that had impeded the performance of earlier attempts at building a field-effect transistor.

Commercialization
The MOSFET was the first truly compact transistor that could be miniaturised and mass-produced for a wide range of uses. Despite the breakthrough, the MOSFET was initially overlooked and ignored by Bell Labs in favour of bipolar transistors, which led to Atalla resigning from Bell Labs and joining in 1961. The MOSFET represented a radically new technology, the adoption of which would have required spurning the progress that Bell had made with the (BJT). However, the MOSFET generated significant interest at and. In December 1960, Karl Zaininger and Charles Meuller at RCA began fabricating an MOS device based on Atalla's device. Similarly based on Atalla's work, at Fairchild in late 1960 began building an MOS-controlled, which he presented in 1961.

In the early 1960s, research programs on MOS technology were established by Fairchild, RCA, (led by former Fairchild engineer ) and. In 1963, the first formal public announcement of the MOSFET's existence as a potential technology was made. It was then first commercialized by General Microelectronics (GMe) in May 1964, followed Fairchild in October 1964. GMe's first MOS contract was with, which used MOSFETs for and  in the  (IMP) program and. The early MOSFETs commercialized by GMe and Fairchild were  devices for logic and switching applications.

MOS revolution
The development of the MOSFET led to a revolution in technology, called the MOS revolution or MOSFET revolution. The MOSFET was the first truly compact transistor that could be miniaturised and mass-produced for a wide range of uses. With its rapidly, MOS technology became the focus of RCA, Fairchild, and other  companies in the 1960s, fuelling the technological and economic growth of the early  based around  (including what later became known as ) as well as Japan. The impact of the MOSFET became commercially significant from the late 1960s onwards. This led to a revolution in the, which has since impacted in almost every way, with MOS technology leading to revolutionary changes in , ,  and. The MOSFET forms the basis of modern electronics, and is the basic element in most modern. It is the most common transistor in electronics, and the most widely used in the world. It has been described as the "workhorse of the electronics industry" and "the base technology" of the late 20th to early 21st centuries.

and (see ) has been the primary factor behind the rapid exponential growth of electronic  technology since the 1960s, as the rapid miniaturization of MOSFETs has been largely responsible for the increasing, increasing performance and decreasing  of integrated circuit chips and electronic devices since the 1960s. According to Jean-Pierre Colinge, numerous modern technologies would not exist without the MOSFET, such as the modern, systems, ,  and es.

The MOSFET has been called the most important, the most important device in the electronics industry, the most important device in the , one of the most important developments in technology, the birth of modern , and possibly the most important invention in electronics. The MOSFET was central to the electronics revolution, revolution,, and , and has been the fundamental building block of modern  during the , , , and. MOSFETs have been the driving force behind the, and the technologies enabled by it. The rapid progress of the electronics industry during the late 20th to early 21st centuries was achieved by rapid ( and ), down to the level of s in the early 21st century.

The MOSFET is the in history. The MOSFET generates annual sales of US$295 billion as of 2015. Between 1960 and 2018, an estimated total of 13 MOS transistors have been manufactured, accounting for at least 99.9% of all transistors. Digital such as s and  contain thousands to billions of integrated MOSFET transistors on each device, providing the basic switching functions required to implement s and data storage. There are also memory devices which contain at least a trillion MOS transistors, such as a 256, larger than the number of  in the. As of 2010, the operating principles of modern MOSFETs have remained largely the same as the original MOSFET first demonstrated by and  in 1960.

MOS technology, including chips and discrete s, are fundamental to modern  and, such as the , ,  telecommunications, and s. Advances in MOS technology has been the most important contributing factor in the rapid rise of  in s, with bandwidth doubling every 18 months, from  to.

The calls the MOSFET a "groundbreaking invention that transformed life and culture around the world" and the  credits it with "irrevocably changing the human experience." The MOSFET was also the basis for winning breakthroughs such as the  and the  (CCD), yet there was never any Nobel Prize given for the MOSFET itself. In 2018, the which awards the science Nobel Prizes acknowledged that the invention of the MOSFET by Atalla and Kahng was one of the most important inventions in  and in  (ICT). The MOSFET is also included on the in electronics, and its inventors Mohamed Atalla and Dawon Kahng entered the  in 2009.

Common applications
The MOSFET is by far the most widely used transistor in both s and s, and it is the backbone of modern. It is the basis for numerous modern technologies, and is commonly used for a wide range of applications. Common applications of MOS technology include the following.

• technology, including  and.

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• s, including digital cellular networks, (GSM),, , , and.

• circuits, including  and s.

•, including (PC), ,  and , , , , , , s, , , and.

• (CAD).

•, including s, peripheral controllers, control,  controllers, and.

•, including (GPU) and.

• components, including s,  chips,, , , ,  (VRM), and.

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•, such as (OCR).

•, such as electronic , , and s.

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• (DAC), such as for.

• cache, including,  ( and ), and  players ( and ).

• s, including s, (FPD),, , and  panels.

• technology, including  applications, s, and long  for.

•, including.

• (ECU) systems, including s and  (TCU).

•, including , electronic , and.

• Electronic, including , (DSP), , , and  processing.

• products, including  equipment.

•, including sensors.

•, including (SSD),  (such as  and ), and  (CTF).

•, including (e-paper) and.

• memory, including  (NVM), erasable PROM, and electrically erasable PROM.

•, including dimmable and.

• (HDD) technology, including spindle speed control and disk buffer cache.

•, including s.

•, including , , and applications.

• (ICT), including  (IT) and.

•, including the Internet , , , (IoT), , , , and social infrastructure.

• (LED) technology, including, dimmable  circuits (such as for  and ), and  (organic LED) displays.

• (LCD) technology, including  (AM LCD),  LCD,  (LCD TV), and  (IPS) panel.

•, including , (such as ), and portable  (such as  and  ).

• (MPU) chips, including  (CPU), s (such as, , , and ), and s.

•, including , , and (MEMS).

•, including , , and monitoring sensors.

•, including devices, , , , and  (PDA).

• Monitoring, including , and  monitoring, , , , , , security, , and  (, , , and ).

• MOS, including (CCD) and CMOS  (APS).

• (MOS IC) chips, including s, s,,  (ASIC), and  (ALU).

• MOS (MOS LSI), including  (VLSI),  (MCU),  (ASSP),, s,  (SoC), and.

•, including s, , , , , analog memory, , , and.

• MOS memory applications, including storage (such as ),  memory (such as ), s,  storage,, embedded memory, , , and.

• MOS, including and , s ,  (such as , ,  and  sensors), s, and  (WSN).

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• s, including s, s, and s.

•, including ,  (SSPS), , , power integrated circuit , and.

•, including (SMPS).

• technology, including, , s, and.

• (PLD) chips, including  (FPGA),  (EPLD), and  (CPLD).

•  drives.

• (QoL) improvements.

•, including Quantum , (2DEG), , and.

• systems, including  radar applications.

• technology, including  (RF) technology,, s, , , , s,  integrated circuits, , , , ,  (SDR), s, , and.

• (RAM), including  (SRAM),  (DRAM),, ,  (NVRAM),  (FRAM),  (PRAM), and  (ReRAM).

• (ROM), including  (MROM) and  (PROM).

•.

•  technology, including silicon  (IC) chips.

•, including and.

•, including , , and applications.

•, including , , , , (IMP), , , and space monitoring (, , , , and  phenomena).

•, including , equipment, and voice.

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• (SDRAM) memory, including  SDRAM,  (RDRAM), and.

•, including s, , , , s, ing networks, , , , (ISDN), and s.

•, including , , , machines, s, ,  signal receivers, and  circuits.

•, including s, s, , phones, , , , digital cordless telephones, digital cell phones, , and.

• s, including (PSTN),  (ESS),,  (PBX),  (KTS), and telephone.

•, including , , , digital tapeless , and multiplexers.

• (TV), including TV systems, s, TV receiver circuits,,  , s, , , , , and.

• (3D IC) chips, including  (TSV) technology.

• technology, including, , DSP touch processor, and ASIC touch controller.

• sensors, including, , and.

• s.

• chips, such as for  and  decoding.

•, including , , s, (FMV), and.

•, including memory,  (VRAM),  (SGRAM), and.

•, including electronic , , , , and.

• technology, including, , , , , s,  terminals, , , , ,  (GPS),  (NFC),  (DECT), and  (WLAN).

• s, including and s.

Composition
Usually the of choice is. Recently, some chip manufacturers, most notably and, have started using a  of silicon and germanium  in MOSFET channels. Unfortunately, many semiconductors with better electrical properties than silicon, such as, do not form good semiconductor-to-insulator interfaces, and thus are not suitable for MOSFETs. Research continues on creating insulators with acceptable electrical characteristics on other semiconductor materials.

To overcome the increase in power consumption due to gate current leakage, a is used instead of silicon dioxide for the gate insulator, while polysilicon is replaced by metal gates (e.g., 2009).

The gate is separated from the channel by a thin insulating layer, traditionally of silicon dioxide and later of. Some companies have started to introduce a high-κ dielectric and metal gate combination in the node.

When a voltage is applied between the gate and body terminals, the electric field generated penetrates through the oxide and creates an  or channel at the semiconductor-insulator interface. The inversion layer provides a channel through which current can pass between source and drain terminals. Varying the voltage between the gate and body modulates the of this layer and thereby controls the current flow between drain and source. This is known as enhancement mode.

Metal–oxide–semiconductor structure
The traditional metal–oxide–semiconductor (MOS) structure is obtained by growing a layer of  on top of a  substrate, commonly by  and depositing a layer of metal or  (the latter is commonly used). As the silicon dioxide is a material, its structure is equivalent to a planar, with one of the electrodes replaced by a.

When a voltage is applied across a MOS structure, it modifies the distribution of charges in the semiconductor. If we consider a p-type semiconductor (with $$N_\text{A}$$ the density of, p the density of holes; p = NA in neutral bulk), a positive voltage, $$V_\text{GB}$$, from gate to body (see figure) creates a by forcing the positively charged holes away from the gate-insulator/semiconductor interface, leaving exposed a carrier-free region of immobile, negatively charged acceptor ions (see ). If $$V_\text{GB}$$ is high enough, a high concentration of negative charge carriers forms in an  located in a thin layer next to the interface between the semiconductor and the insulator.

Conventionally, the gate voltage at which the volume density of electrons in the inversion layer is the same as the volume density of holes in the body is called the. When the voltage between transistor gate and source (VGS) exceeds the threshold voltage (Vth), the difference is known as.

This structure with p-type body is the basis of the n-type MOSFET, which requires the addition of n-type source and drain regions.

MOS capacitors and band diagrams
The MOS capacitor structure is the heart of the MOSFET. Consider a MOS capacitor where the silicon base is of p-type. If a positive voltage is applied at the gate, holes which are at the surface of the p-type substrate will be repelled by the electric field generated by the voltage applied. At first, the holes will simply be repelled and what will remain on the surface will be immobile (negative) atoms of the acceptor type, which creates a depletion region on the surface. Remember that a hole is created by an acceptor atom, e.g. Boron, which has one less electron than Silicon. One might ask how can holes be repelled if they are actually non-entities? The answer is that what really happens is not that a hole is repelled, but electrons are attracted by the positive field, and fill these holes, creating a depletion region where no charge carriers exist because the electron is now fixed onto the atom and immobile.

As the voltage at the gate increases, there will be a point at which the surface above the depletion region will be converted from p-type into n-type, as electrons from the bulk area will start to get attracted by the larger electric field. This is known as inversion. The threshold voltage at which this conversion happens is one of the most important parameters in a MOSFET.

In the case of a p-type bulk, inversion happens when the intrinsic energy level at the surface becomes smaller than the at the surface. One can see this from a band diagram. Remember that the Fermi level defines the type of semiconductor in discussion. If the Fermi level is equal to the Intrinsic level, the semiconductor is of intrinsic, or pure type. If the Fermi level lies closer to the conduction band (valence band) then the semiconductor type will be of n-type (p-type). Therefore, when the gate voltage is increased in a positive sense (for the given example), this will "bend" the intrinsic energy level band so that it will curve downwards towards the valence band. If the Fermi level lies closer to the valence band (for p-type), there will be a point when the Intrinsic level will start to cross the Fermi level and when the voltage reaches the threshold voltage, the intrinsic level does cross the Fermi level, and that is what is known as inversion. At that point, the surface of the semiconductor is inverted from p-type into n-type. Remember that as said above, if the Fermi level lies above the Intrinsic level, the semiconductor is of n-type, therefore at Inversion, when the Intrinsic level reaches and crosses the Fermi level (which lies closer to the valence band), the semiconductor type changes at the surface as dictated by the relative positions of the Fermi and Intrinsic energy levels.

Structure and channel formation
A MOSFET is based on the modulation of charge concentration by a MOS capacitance between a body electrode and a gate electrode located above the body and insulated from all other device regions by a layer. If dielectrics other than an oxide are employed, the device may be referred to as a metal-insulator-semiconductor FET (MISFET). Compared to the MOS capacitor, the MOSFET includes two additional terminals (source and drain), each connected to individual highly doped regions that are separated by the body region. These regions can be either p or n type, but they must both be of the same type, and of opposite type to the body region. The source and drain (unlike the body) are highly doped as signified by a "+" sign after the type of doping.

If the MOSFET is an n-channel or nMOS FET, then the source and drain are n+ regions and the body is a p region. If the MOSFET is a p-channel or pMOS FET, then the source and drain are p+ regions and the body is a n region. The source is so named because it is the source of the charge carriers (electrons for n-channel, holes for p-channel) that flow through the channel; similarly, the drain is where the charge carriers leave the channel.

The occupancy of the energy bands in a semiconductor is set by the position of the relative to the semiconductor energy-band edges.

With sufficient gate voltage, the valence band edge is driven far from the Fermi level, and holes from the body are driven away from the gate.

At larger gate bias still, near the semiconductor surface the conduction band edge is brought close to the Fermi level, populating the surface with electrons in an inversion layer or n-channel at the interface between the p region and the oxide. This conducting channel extends between the source and the drain, and current is conducted through it when a voltage is applied between the two electrodes. Increasing the voltage on the gate leads to a higher electron density in the inversion layer and therefore increases the current flow between the source and drain. For gate voltages below the threshold value, the channel is lightly populated, and only a very small current can flow between the source and the drain.

When a negative gate–source voltage is applied, it creates a p-channel at the surface of the n region, analogous to the n-channel case, but with opposite polarities of charges and voltages. When a voltage less negative than the threshold value (a negative voltage for the p-channel) is applied between gate and source, the channel disappears and only a very small subthreshold current can flow between the source and the drain. The device may comprise a device in which a buried oxide is formed below a thin semiconductor layer. If the channel region between the gate dielectric and the buried oxide region is very thin, the channel is referred to as an ultrathin channel region with the source and drain regions formed on either side in or above the thin semiconductor layer. Other semiconductor materials may be employed. When the source and drain regions are formed above the channel in whole or in part, they are referred to as raised source/drain regions.

Modes of operation
The operation of a MOSFET can be separated into three different modes, depending on the voltages at the terminals. In the following discussion, a simplified algebraic model is used. Modern MOSFET characteristics are more complex than the algebraic model presented here.

For an enhancement-mode, n-channel MOSFET, the three operational modes are:


 * Cutoff, subthreshold, and weak-inversion mode

When VGS &lt; Vth:

where $$V_\text{GS}$$ is gate-to-source bias and $$V_\text{th}$$ is the of the device.

According to the basic threshold model, the transistor is turned off, and there is no conduction between drain and source. A more accurate model considers the effect of thermal energy on the of electron energies which allow some of the more energetic electrons at the source to enter the channel and flow to the drain. This results in a subthreshold current that is an exponential function of gate–source voltage. While the current between drain and source should ideally be zero when the transistor is being used as a turned-off switch, there is a weak-inversion current, sometimes called subthreshold leakage.

In weak inversion where the source is tied to bulk, the current varies exponentially with $$V_\text{GS}$$ as given approximately by:


 * $$I_\text{D} \approx I_\text{D0} e^\frac{V_\text{GS} - V_\text{th}}{nV_\text{T}}, $$

where $$I_\text{D0}$$ = current at $$V_\text{GS} = V_\text{th}$$, the thermal voltage $$V_\text{T} = kT/q$$ and the slope factor n is given by:


 * $$n = 1 + \frac{C_\text{dep}}{C_\text{ox}}, \, $$

with $$C_\text{dep}$$ = capacitance of the depletion layer and $$C_\text{ox}$$ = capacitance of the oxide layer. This equation is generally used, but is only an adequate approximation for the source tied to the bulk. For the source not tied to the bulk, the subthreshold equation for drain current in saturation is


 * $$I_\text{D} \approx I_\text{D0} e^\frac{\kappa \left(V_\text{G} - V_\text{th}\right) - V_\text{S}}{V_\text{T}}, $$

where the $$\kappa$$ is the channel divider that is given by:


 * $$\kappa = \frac{C_\text{ox}}, $$

with $$C_\text{D}$$ = capacitance of the depletion layer and $$C_\text{ox}$$ = capacitance of the oxide layer. In a long-channel device, there is no drain voltage dependence of the current once $$V_\text{DS} \gg V_\text{T}$$, but as channel length is reduced introduces drain voltage dependence that depends in a complex way upon the device geometry (for example, the channel doping, the junction doping and so on). Frequently, threshold voltage Vth for this mode is defined as the gate voltage at which a selected value of current ID0 occurs, for example, ID0 = 1μA, which may not be the same Vth-value used in the equations for the following modes.

Some micropower analog circuits are designed to take advantage of subthreshold conduction. By working in the weak-inversion region, the MOSFETs in these circuits deliver the highest possible transconductance-to-current ratio, namely: $$g_m/I_\text{D} = 1/\left(nV_\text{T}\right)$$, almost that of a bipolar transistor.

The subthreshold  depends exponentially upon threshold voltage, introducing a strong dependence on any manufacturing variation that affects threshold voltage; for example: variations in oxide thickness, junction depth, or body doping that change the degree of drain-induced barrier lowering. The resulting sensitivity to fabricational variations complicates optimization for leakage and performance.


 * Triode mode or linear region (also known as the ohmic mode)

When VGS &gt; Vth and VDS &lt; VGS − Vth:

The transistor is turned on, and a channel has been created which allows current between the drain and the source. The MOSFET operates like a resistor, controlled by the gate voltage relative to both the source and drain voltages. The current from drain to source is modeled as:


 * $$I_\text{D} = \mu_n C_\text{ox}\frac{W}{L} \left( \left(V_\text{GS} - V_{\rm th}\right)V_\text{DS} - \frac{{V_\text{DS}}^2}{2} \right)$$

where $$\mu_n$$ is the charge-carrier effective mobility, $$W$$ is the gate width, $$L$$ is the gate length and $$C_\text{ox}$$ is the capacitance per unit area. The transition from the exponential subthreshold region to the triode region is not as sharp as the equations suggest.


 * Saturation or active mode

When VGS &gt; Vth and VDS ≥ (VGS – Vth):

The switch is turned on, and a channel has been created, which allows current between the drain and source. Since the drain voltage is higher than the source voltage, the electrons spread out, and conduction is not through a narrow channel but through a broader, two- or three-dimensional current distribution extending away from the interface and deeper in the substrate. The onset of this region is also known as to indicate the lack of channel region near the drain. Although the channel does not extend the full length of the device, the electric field between the drain and the channel is very high, and conduction continues. The drain current is now weakly dependent upon drain voltage and controlled primarily by the gate–source voltage, and modeled approximately as:


 * $$I_\text{D} = \frac{\mu_n C_\text{ox}}{2}\frac{W}{L}\left[V_\text{GS} - V_\text{th}\right]^2 \left[1 + \lambda (V_\text{DS} - V_\text{DSsat})\right].$$

The additional factor involving λ, the channel-length modulation parameter, models current dependence on drain voltage due to the, effectively similar to the seen in bipolar devices. According to this equation, a key design parameter, the MOSFET transconductance is:


 * $$g_m = \frac{\partial I_D}{\partial V_\text{GS}} = \frac{2I_\text{D}}{V_\text{GS} - V_\text{th}} = \frac{2I_\text{D}}{V_\text{ov}}, $$

where the combination Vov = VGS − Vth is called the, and where VDSsat = VGS − Vth accounts for a small discontinuity in $$I_\text{D}$$ which would otherwise appear at the transition between the triode and saturation regions.

Another key design parameter is the MOSFET output resistance rout given by:


 * $$r_\text{out} = \frac{1}{\lambda I_\text{D}}$$.

rout is the inverse of gDS where $$g_\text{DS} = \frac{\partial I_\text{DS}}{\partial V_\text{DS}}$$. ID is the expression in saturation region.

If λ is taken as zero, an infinite output resistance of the device results that leads to unrealistic circuit predictions, particularly in analog circuits.

As the channel length becomes very short, these equations become quite inaccurate. New physical effects arise. For example, carrier transport in the active mode may become limited by. When velocity saturation dominates, the saturation drain current is more nearly linear than quadratic in VGS. At even shorter lengths, carriers transport with near zero scattering, known as quasi-. In the ballistic regime, the carriers travel at an injection velocity that may exceed the saturation velocity and approaches the at high inversion charge density. In addition, drain-induced barrier lowering increases off-state (cutoff) current and requires an increase in threshold voltage to compensate, which in turn reduces the saturation current.

Body effect
The occupancy of the energy bands in a semiconductor is set by the position of the relative to the semiconductor energy-band edges. Application of a source-to-substrate reverse bias of the source-body pn-junction introduces a split between the Fermi levels for electrons and holes, moving the Fermi level for the channel further from the band edge, lowering the occupancy of the channel. The effect is to increase the gate voltage necessary to establish the channel, as seen in the figure. This change in channel strength by application of reverse bias is called the 'body effect'.

Simply put, using an nMOS example, the gate-to-body bias VGB positions the conduction-band energy levels, while the source-to-body bias VSB positions the electron Fermi level near the interface, deciding occupancy of these levels near the interface, and hence the strength of the inversion layer or channel.

The body effect upon the channel can be described using a modification of the threshold voltage, approximated by the following equation:


 * $$V_\text{TB} = V_{T0} + \gamma \left( \sqrt{V_\text{SB} + 2\varphi_B} - \sqrt{2\varphi_B} \right),$$

where VTB is the threshold voltage with substrate bias present, and VT0 is the zero-VSB value of threshold voltage, $$\gamma$$ is the body effect parameter, and 2φB is the approximate potential drop between surface and bulk across the depletion layer when and gate bias is sufficient to ensure that a channel is present. As this equation shows, a reverse bias VSB > 0 causes an increase in threshold voltage VTB and therefore demands a larger gate voltage before the channel populates.

The body can be operated as a second gate, and is sometimes referred to as the "back gate"; the body effect is sometimes called the "back-gate effect".

Circuit symbols
A variety of symbols are used for the MOSFET. The basic design is generally a line for the channel with the source and drain leaving it at right angles and then bending back at right angles into the same direction as the channel. Sometimes three line segments are used for and a solid line for depletion mode (see ). Another line is drawn parallel to the channel for the gate.

The bulk or body connection, if shown, is shown connected to the back of the channel with an arrow indicating pMOS or nMOS. Arrows always point from P to N, so an NMOS (N-channel in P-well or P-substrate) has the arrow pointing in (from the bulk to the channel). If the bulk is connected to the source (as is generally the case with discrete devices) it is sometimes angled to meet up with the source leaving the transistor. If the bulk is not shown (as is often the case in IC design as they are generally common bulk) an inversion symbol is sometimes used to indicate PMOS, alternatively an arrow on the source may be used in the same way as for bipolar transistors (out for nMOS, in for pMOS).

Comparison of enhancement-mode and depletion-mode MOSFET symbols, along with symbols. The orientation of the symbols, (most significantly the position of source relative to drain) is such that more positive voltages appear higher on the page than less positive voltages, implying current flowing "down" the page:

In schematics where G, S, D are not labeled, the detailed features of the symbol indicate which terminal is source and which is drain. For enhancement-mode and depletion-mode MOSFET symbols (in columns two and five), the source terminal is the one connected to the triangle. Additionally, in this diagram, the gate is shown as an "L" shape, whose input leg is closer to S than D, also indicating which is which. However, these symbols are often drawn with a "T" shaped gate (as elsewhere on this page), so it is the triangle which must be relied upon to indicate the source terminal.

For the symbols in which the bulk, or body, terminal is shown, it is here shown internally connected to the source (i.e., the black triangles in the diagrams in columns 2 and 5). This is a typical configuration, but by no means the only important configuration. In general, the MOSFET is a four-terminal device, and in integrated circuits many of the MOSFETs share a body connection, not necessarily connected to the source terminals of all the transistors.

PMOS and NMOS logic
uses MOSFETs to implement s and other s.  uses  MOSFETs to implement logic gates and other digital circuits.

For devices of equal current driving capability, n-channel MOSFETs can be made smaller than p-channel MOSFETs, due to p-channel charge carriers having lower  than do n-channel charge carriers, and producing only one type of MOSFET on a silicon substrate is cheaper and technically simpler. These were the driving principles in the design of which uses n-channel MOSFETs exclusively. However, neglecting, unlike CMOS logic, NMOS logic consumes power even when no switching is taking place.

and originally demonstrated both pMOS and nMOS devices with  and then  gate lengths in 1960. Their original MOSFET devices also had a thickness of. However, the nMOS devices were impractical, and only the pMOS type were practical working devices. A more practical NMOS process was developed several years later. NMOS was initially faster than, thus NMOS was more widely used for computers in the 1970s. With advances in technology, CMOS logic displaced NMOS logic in the mid-1980s to become the preferred process for digital chips.

Complementary MOS (CMOS)
The MOSFET is used in digital  logic, which uses p- and n-channel MOSFETs as building blocks. Overheating is a major concern in s since ever more transistors are packed into ever smaller chips. CMOS logic reduces power consumption because no current flows (ideally), and thus no is consumed, except when the inputs to s are being switched. CMOS accomplishes this current reduction by complementing every nMOSFET with a pMOSFET and connecting both gates and both drains together. A high voltage on the gates will cause the nMOSFET to conduct and the pMOSFET not to conduct and a low voltage on the gates causes the reverse. During the switching time as the voltage goes from one state to another, both MOSFETs will conduct briefly. This arrangement greatly reduces power consumption and heat generation.

CMOS was developed by and  at  in 1963. CMOS had lower power consumption, but was initially slower than NMOS, which was more widely used for computers in the 1970s. In 1978, introduced the twin-well CMOS process, which allowed CMOS to match the performance of NMOS with less power consumption. The twin-well CMOS process eventually overtook NMOS as the most common for computers in the 1980s.

Depletion-mode
There are depletion-mode MOSFET devices, which are less commonly used than the standard enhancement-mode devices already described. These are MOSFET devices that are doped so that a channel exists even with zero voltage from gate to source. To control the channel, a negative voltage is applied to the gate (for an n-channel device), depleting the channel, which reduces the current flow through the device. In essence, the depletion-mode device is equivalent to a (on) switch, while the enhancement-mode device is equivalent to a  (off) switch.

Due to their low in the  region, and better, these devices are often preferred to  in  such as in  sets.

Depletion-mode MOSFET families include BF960 by and, and the BF980 in the 1980s by  (later to become ), whose derivatives are still used in  and RF  front-ends.

Metal-insulator-semiconductor field-effect transistor (MISFET)
Metal-insulator-semiconductor field-effect-transistor, or MISFET, is a more general term than MOSFET and a synonym to insulated-gate field-effect transistor (IGFET). All MOSFETs are MISFETs, but not all MISFETs are MOSFETs.

The gate dielectric insulator in a MISFET is in a MOSFET, but other materials can also be employed. The lies directly below the  and above the  of the MISFET. The term metal is historically used for the gate material, even though now it is usually  or some other.

Insulator types may be:


 * Silicon dioxide, in MOSFETs
 * Organic insulators (e.g., undoped trans-; cyanoethyl, CEP), for organic-based FETs.

Floating-gate MOSFET (FGMOS)
The (FGMOS) is a type of MOSFET where the gate is electrically isolated, creating a floating node in DC and a number of secondary gates or inputs are deposited above the floating gate (FG) and are electrically isolated from it. The first report of a (FGMOS) was made by  (co-inventor of the original MOSFET) and  in 1967.

The FGMOS is commonly used as a floating-gate, the digital storage element in , and. Other uses of the FGMOS include a neuronal computational element in s, analog storage element, s and single-transistor.

Power MOSFET
s have a different structure. As with most power devices, the structure is vertical and not planar. Using a vertical structure, it is possible for the transistor to sustain both high blocking voltage and high current. The voltage rating of the transistor is a function of the doping and thickness of the N- layer (see cross section), while the current rating is a function of the channel width (the wider the channel, the higher the current). In a planar structure, the current and breakdown voltage ratings are both a function of the channel dimensions (respectively width and length of the channel), resulting in inefficient use of the "silicon estate". With the vertical structure, the component area is roughly proportional to the current it can sustain, and the component thickness (actually the N-epitaxial layer thickness) is proportional to the breakdown voltage.

Power MOSFETs with lateral structure are mainly used in high-end audio amplifiers and high-power PA systems. Their advantage is a better behaviour in the saturated region (corresponding to the linear region of a ) than the vertical MOSFETs. Vertical MOSFETs are designed for switching applications.

The power MOSFET, which is commonly used in, was developed in the early 1970s. The power MOSFET enables low gate drive power, fast switching speed, and advanced paralleling capability.

Double-diffused metal–oxide–semiconductor (DMOS)
There are ' (vertical double-diffused metal oxide semiconductor) and ' (lateral double-diffused metal oxide semiconductor). Most power MOSFETs are made using this technology.

MOS capacitor
The MOS is part of the MOSFET structure, where the MOS capacitor is flanked by two s. The MOS capacitor is widely used as a storage capacitor in s, and as the basic building block of the  (CCD) in  technology. In (dynamic ), each  typically consists of a MOSFET and MOS capacitor.

Thin-film transistor (TFT)
The (TFT) is a type of MOSFET distinct from the standard bulk MOSFET. The first TFT was invented by at  in 1962, building on the earlier work of Atalla and Kahng on MOSFETs.

The idea of a TFT-based (LCD) was conceived by Bernard Lechner of  in 1968. Lechner, F. J. Marlowe, E. O. Nester and J. Tults demonstrated the concept in 1968 with an 18x2 matrix LCD that used standard discrete MOSFETs, as TFT performance was not adequate at the time.

Bipolar-MOS transistors
is an that combines BJT and  (CMOS) transistors on a single chip.

The (IGBT) is a  with characteristics of both a MOSFET and  (BJT).

MOS sensors
A number of MOSFET have been developed, for measuring, ,  and  parameters. The earliest MOSFET sensors include the open-gate FET (OGFET) introduced by Johannessen in 1970, the (ISFET) invented by  in 1970, the  FET (ADFET)  by P.F. Cox in 1974, and a -sensitive MOSFET demonstrated by I. Lundstrom, M.S. Shivaraman, C.S. Svenson and L. Lundkvist in 1975. The ISFET is a special type of MOSFET with a gate at a certain distance, and where the is replaced by an -sensitive,  solution and.

By the mid-1980s, numerous other MOSFET sensors had been developed, including the FET (GASFET), surface accessible FET (SAFET), charge flow transistor (CFT),  FET (PRESSFET),  (ChemFET),  (REFET),  (BioFET),  (ENFET) and immunologically modified FET (IMFET). By the early 2000s, BioFET types such as the (DNAFET),  FET (GenFET) and  BioFET (CPFET) had been developed.

The two main types of s used in technology are the  (CCD) and the  (CMOS sensor). Both CCD and CMOS sensors are based on MOS technology, with the CCD based on s and the CMOS sensor based on MOS transistors.

Multi-gate field-effect transistor (MuGFET)
The (DGMOS) has a  configuration, where both gates control the current in the device. It is commonly used for small-signal devices in radio frequency applications where biasing the drain-side gate at constant potential reduces the gain loss caused by, replacing two separate transistors in configuration. Other common uses in RF circuits include gain control and mixing (frequency conversion). The tetrode description, though accurate, does not replicate the vacuum-tube tetrode. Vacuum-tube tetrodes, using a screen grid, exhibit much lower grid-plate capacitance and much higher output impedance and voltage gains than triode vacuum tubes. These improvements are commonly an order of magnitude (10 times) or considerably more. Tetrode transistors (whether bipolar junction or field-effect) do not exhibit improvements of such a great degree.

The is a double-gate  device, one of a number of geometries being introduced to mitigate the effects of short channels and reduce drain-induced barrier lowering. The fin refers to the narrow channel between source and drain. A thin insulating oxide layer on either side of the fin separates it from the gate. SOI FinFETs with a thick oxide on top of the fin are called double-gate and those with a thin oxide on top as well as on the sides are called triple-gate FinFETs.

A MOSFET transistor was first demonstrated in 1984 by  researchers Toshihiro Sekigawa and Yutaka Hayashi. A (gate-all-around MOSFET), a type of  non-planar, was first demonstrated in 1988 by a  research team including , H. Takato and K. Sunouchi. The (fin field-effect transistor), a type of 3D non-planar double-gate MOSFET, originated from the research of Digh Hisamoto and his team at  in 1989. The development of multi-gate MOSFETs have since become fundamental to.

Radiation-hardened-by-design (RHBD)
Semiconductor sub-micrometer and nanometer electronic circuits are the primary concern for operating within the normal tolerance in harsh environments like. One of the design approaches for making a (RHBD) device is enclosed-layout-transistor (ELT). Normally, the gate of the MOSFET surrounds the drain, which is placed in the center of the ELT. The source of the MOSFET surrounds the gate. Another RHBD MOSFET is called H-Gate. Both of these transistors have very low leakage current with respect to radiation. However, they are large in size and take more space on silicon than a standard MOSFET. In older STI (shallow trench isolation) designs, radiation strikes near the silicon oxide region cause the channel inversion at the corners of the standard MOSFET due to accumulation of radiation induced trapped charges. If the charges are large enough, the accumulated charges affect STI surface edges along the channel near the channel interface (gate) of the standard MOSFET. Thus the device channel inversion occurs along the channel edges and the device creates an off-state leakage path, causing the device to turn on. So the reliability of circuits degrades severely. The ELT offers many advantages. These advantages include improvement of by reducing unwanted surface inversion at the gate edges that occurs in the standard MOSFET. Since the gate edges are enclosed in ELT, there is no gate oxide edge (STI at gate interface), and thus the transistor off-state leakage is reduced considerably. Low-power microelectronic circuits including computers, communication devices and monitoring systems in the space shuttle and satellites are very different to what is used on earth. They require radiation (high-speed atomic particles like and,  magnetic energy dissipation in Earth's space, energetic  like ,  etc.) tolerant circuits. These special electronics are designed by applying different techniques using RHBD MOSFETs to ensure safer journeys and space-walks for astronauts.

Applications
Discrete MOSFET devices are widely used in applications such as, s and other applications where each device may be switching thousands of watts. Radio-frequency amplifiers up to the spectrum use MOSFET transistors as analog signal and power amplifiers. Radio systems also use MOSFETs as oscillators, or s to convert frequencies. MOSFET devices are also applied in audio-frequency power amplifiers for public address systems, and home and automobile sound systems.

MOS integrated circuit
The MOSFET is the most widely used type of transistor and the most critical device component in (IC) chips. The chip was enabled by the  process, which electrically stabilized  surfaces via, making it possible to  monolithic integrated circuit chips using silicon. The surface passivation process was developed by at  in 1957. This was the basis for the, developed by at  in early 1959, which was critical to the invention of the monolithic integrated circuit chip by  later in 1959. The same year, Atalla used his surface passivation process to invent the MOSFET with at Bell Labs. This was followed by the development of s to reduce contamination to levels never before thought necessary, and coincided with the development of which, along with surface passivation and the planar process, allowed circuits to be made in few steps.

Mohamed Atalla first proposed the concept of the MOS integrated circuit (MOS IC) chip in 1960, noting that the MOSFET's ease of made it useful for integrated circuits. In contrast to which required a number of steps for the  of transistors on a chip, MOSFETs required no such steps but could be easily isolated from each other. Its advantage for integrated circuits was re-iterated by Dawon Kahng in 1961. The – system possessed the technical attractions of low cost of production (on a per circuit basis) and ease of integration. These two factors, along with its miniaturization and low, led to the MOSFET becoming the most widely used type of transistor in IC chips.

The earliest experimental MOS IC to be demonstrated was a 16-transistor chip built by Fred Heiman and Steven Hofstein at in 1962. later introduced the first commercial MOS integrated circuits in 1964, consisting of 120 transistors. It was a 20-bit, developed by Robert Norman and. In 1967, researchers Robert Kerwin, Donald Klein and John Sarace developed the  (silicon-gate) MOS transistor, which  researchers  and Tom Klein used to develop the first  MOS IC.

Large-scale integration (LSI)
With its, and much lower power consumption and higher density than bipolar junction transistors, the MOSFET made it possible to build IC chips. By 1964, MOS chips had reached higher and lower manufacturing costs than  chips. MOS chips further increased in complexity at a rate predicted by, leading to (LSI) with hundreds of MOSFETs on a chip by the late 1960s. MOS technology enabled the integration of more than 10,000 transistors on a single LSI chip by the early 1970s, before later enabling (VLSI).

One of the earliest influential products enabled by MOS LSI circuits was the electronic, as MOS LSI technology enabled large amounts of  capability in small packages. In 1965, the 3900  was the first MOS LSI, with 29 MOS LSI chips. In 1967 the Cal-Tech was the first prototype electronic, with three MOS LSI chips, and it was later released as the  Pocketronic in 1970. The desktop calculator was the first mass-produced LSI MOS calculator in 1969, and the  which used four MOS LSI chips was the first commercial electronic handheld calculator in 1970. The first true electronic pocket calculator was the LE-120A HANDY LE, which used a single MOS LSI  from, and was released in 1971. By 1972, MOS LSI circuits were commercialized for numerous other applications.

Microprocessors
The MOSFET is the basis of every, and was responsible for the invention of the microprocessor. The origins of both the microprocessor and the can be traced back to the invention and development of MOS technology. The application of MOS LSI chips to was the basis for the first microprocessors, as engineers began recognizing that a complete  could be contained on a single MOS LSI chip.

The were all MOS chips, built with MOS LSI circuits. The first multi-chip microprocessors, the in 1969 and the   in 1970, were developed with multiple MOS LSI chips. The first commercial single-chip microprocessor, the, was developed by , using his silicon-gate MOS IC technology, with engineers  and , and  engineer. With the arrival of microprocessors in 1975, the term "MOS microprocessors" began to refer to chips fabricated entirely from  or fabricated entirely from, contrasted with "CMOS microprocessors" and "bipolar  processors".

Digital
The growth of digital technologies like the has provided the motivation to advance MOSFET technology faster than any other type of silicon-based transistor. A big advantage of MOSFETs for digital switching is that the oxide layer between the gate and the channel prevents DC current from flowing through the gate, further reducing power consumption and giving a very large input impedance. The insulating oxide between the gate and channel effectively isolates a MOSFET in one logic stage from earlier and later stages, which allows a single MOSFET output to drive a considerable number of MOSFET inputs. Bipolar transistor-based logic (such as ) does not have such a high fanout capacity. This isolation also makes it easier for the designers to ignore to some extent loading effects between logic stages independently. That extent is defined by the operating frequency: as frequencies increase, the input impedance of the MOSFETs decreases.

Analog
The MOSFET's advantages in digital circuits do not translate into supremacy in all s. The two types of circuit draw upon different features of transistor behavior. Digital circuits switch, spending most of their time either fully on or fully off. The transition from one to the other is only of concern with regards to speed and charge required. Analog circuits depend on operation in the transition region where small changes to V$th$ can modulate the output (drain) current. The JFET and (BJT) are preferred for accurate matching (of adjacent devices in integrated circuits), higher  and certain temperature characteristics which simplify keeping performance predictable as circuit temperature varies.

Nevertheless, MOSFETs are widely used in many types of analog circuits because of their own advantages (zero gate current, high and adjustable output impedance and improved robustness vs. BJTs which can be permanently degraded by even lightly breaking down the emitter-base). The characteristics and performance of many analog circuits can be scaled up or down by changing the sizes (length and width) of the MOSFETs used. By comparison, in bipolar transistors the size of the device does not significantly affect its performance. MOSFETs' ideal characteristics regarding gate current (zero) and drain-source offset voltage (zero) also make them nearly ideal switch elements, and also make analog circuits practical. In their linear region, MOSFETs can be used as precision resistors, which can have a much higher controlled resistance than BJTs. In high power circuits, MOSFETs sometimes have the advantage of not suffering from as BJTs do. Also, MOSFETs can be configured to perform as capacitors and which allow op-amps made from them to appear as inductors, thereby allowing all of the normal analog devices on a chip (except for diodes, which can be made smaller than a MOSFET anyway) to be built entirely out of MOSFETs. This means that complete analog circuits can be made on a silicon chip in a much smaller space and with simpler fabrication techniques. MOSFETS are ideally suited to switch inductive loads because of tolerance to inductive kickback.

Some ICs combine analog and digital MOSFET circuitry on a single, making the needed board space even smaller. This creates a need to isolate the analog circuits from the digital circuits on a chip level, leading to the use of isolation rings and (SOI). Since MOSFETs require more space to handle a given amount of power than a BJT, fabrication processes can incorporate BJTs and MOSFETs into a single device. Mixed-transistor devices are called bi-FETs (bipolar FETs) if they contain just one BJT-FET and (bipolar-CMOS) if they contain complementary BJT-FETs. Such devices have the advantages of both insulated gates and higher current density.

In the late 1980s, pioneered  technology, which uses MOS  circuits, while working at. This changed the way in which s were designed, away from discrete bipolar transistors and towards CMOS integrated circuits. As of 2008, the s in all devices and modern  are mass-produced as RF CMOS devices.

Analog switches
MOSFET analog switches use the MOSFET to pass analog signals when on, and as a high impedance when off. Signals flow in both directions across a MOSFET switch. In this application, the drain and source of a MOSFET exchange places depending on the relative voltages of the source/drain electrodes. The source is the more negative side for an N-MOS or the more positive side for a P-MOS. All of these switches are limited on what signals they can pass or stop by their gate–source, gate–drain, and source–drain voltages; exceeding the voltage, current, or power limits will potentially damage the switch.

Single-type
This analog switch uses a four-terminal simple MOSFET of either P or N type.

In the case of an n-type switch, the body is connected to the most negative supply (usually GND) and the gate is used as the switch control. Whenever the gate voltage exceeds the source voltage by at least a threshold voltage, the MOSFET conducts. The higher the voltage, the more the MOSFET can conduct. An N-MOS switch passes all voltages less than V$gs$ − V$gate$. When the switch is conducting, it typically operates in the linear (or ohmic) mode of operation, since the source and drain voltages will typically be nearly equal.

In the case of a P-MOS, the body is connected to the most positive voltage, and the gate is brought to a lower potential to turn the switch on. The P-MOS switch passes all voltages higher than V$tn$ − V$gate$ (threshold voltage V$tp$ is negative in the case of enhancement-mode P-MOS).

Dual-type (CMOS)
This "complementary" or CMOS type of switch uses one P-MOS and one N-MOS FET to counteract the limitations of the single-type switch. The FETs have their drains and sources connected in parallel, the body of the P-MOS is connected to the high potential (VDD) and the body of the N-MOS is connected to the low potential (gnd). To turn the switch on, the gate of the P-MOS is driven to the low potential and the gate of the N-MOS is driven to the high potential. For voltages between VDD − Vtn and gnd − Vtp, both FETs conduct the signal; for voltages less than gnd − Vtp, the N-MOS conducts alone; and for voltages greater than VDD − Vtn, the P-MOS conducts alone.

The voltage limits for this switch are the gate–source, gate–drain and source–drain voltage limits for both FETs. Also, the P-MOS is typically two to three times wider than the N-MOS, so the switch will be balanced for speed in the two directions.

sometimes incorporates a CMOS MOSFET switch on its output to provide for a low-ohmic, full-range output when on, and a high-ohmic, mid-level signal when off.

Power MOSFETs
The is the most widely used  in the world. Advantages over s in include MOSFETs not requiring a continuous flow of drive current to remain in the ON state, offering higher switching speeds, lower switching power losses, lower on-resistances, and reduced susceptibility to thermal runaway. The power MOSFET had an impact on, enabling higher operating frequencies, size and weight reduction, and increased volume production.

are the most common applications for power MOSFETs, which are also widely used for MOSFET-based s enabled the transition of s from analog to digital in the 1990s, leading to the wide proliferation of wireless mobile networks, which revolutionised. The in particular is the most widely used power amplifier in mobile networks, such as, , and. Over 50billion discrete power MOSFETs are shipped annually, as of 2018. They are widely used for, and  in particular. Power MOSFETs are commonly used in, particularly as switching devices in s, and as s in modern. The (IGBT), a hybrid MOS-bipolar transistor, is also used for a wide variety of applications.

Space industry
In the, MOSFET devices were adopted by for  in 1964, for its  (IMP) program and   program. The use of MOSFETs was a major step forward in the electronics design of and. The IMP D, launched in 1966, was the first spacecraft to use the MOSFET. Data gathered by IMP spacecraft and were used to support the, enabling the first manned  with the  mission in 1969.

The mission to  in 1997 had  accomplished 192  es (SSPS), which also functioned as  in the event of an overload condition. The switches were developed from a combination of two with switching capabilities: the MOSFET and the  (application-specific ). This combination resulted in advanced power switches that had better performance characteristics than traditional mechanical switches.

MOS memory
The first modern for  was introduced in 1965, when John Schmidt at  designed the first MOS, a  MOS  (static ). SRAM became an alternative to, but required six MOS transistors for each of data.

MOS technology is the basis for (dynamic ). In 1966, Dr. at the  was working on MOS memory. While examining the characteristics of MOS technology, he found it was capable of building, and that storing a charge or no charge on the MOS capacitor could represent the 1 and 0 of a bit, while the MOS transistor could control writing the charge to the capacitor. This led to his development of a single-transistor DRAM memory cell. In 1967, Dennard filed a patent under IBM for a single-transistor DRAM (dynamic random-access memory) memory cell, based on MOS technology. MOS memory enabled higher performance, was cheaper, and consumed less power, than, leading to MOS memory overtaking magnetic core memory as the dominant technology by the early 1970s.

, while studying MOSFET structures in 1963, noted the movement of charge through onto a. While he did not pursue it, this idea would later become the basis for (erasable ) technology. In 1967, and  proposed that  memory cells, consisting of s (FGMOS), could be used to produce. Floating-gate memory cells later became the basis for (NVM) technologies including EPROM,  (electrically erasable programmable ROM) and.

Sensors
MOSFET are widely used to measure, ,  and  parameters. The (ISFET), for example, is widely used in  applications, such as the detection of,  detection from ,  detection,  measurement,  sensing, and.

MOSFETs are also widely used in (MEMS), as silicon MOSFETs could interact and communicate with the surroundings and process things such as,  and. An early example of a MEMS device is the resonant-gate transistor, an adaptation of the MOSFET, developed by in 1965.

Image sensors
MOS technology is the basis for modern s, including the (CCD) and the CMOS  (CMOS sensor), used in  and s.  and  developed the CCD in 1969. While researching the MOS process, they realized that an electric charge was the analogy of the magnetic bubble and that it could be stored on a tiny MOS capacitor. As it was fairly straighforward to fabricate a series of MOS capacitors in a row, they connected a suitable voltage to them so that the charge could be stepped along from one to the next. The CCD is a semiconductor circuit that was later used in the first s for.

The MOS (APS) was developed by Tsutomu Nakamura at  in 1985. The CMOS active-pixel sensor was later developed by and his team in the early 1990s.

MOS image sensors are widely used in technology. The first optical mouse, invented by at  in 1980, used a   sensor chip. Since the first commercial optical mouse, the introduced in 1999, most optical mouse devices use CMOS sensors.

Quantum physics
The MOSFET enables to study electron behavior in a two-dimensional gas, called the  (2DEG). In a MOSFET, conduction electrons travel in a thin surface layer, and a "gate" voltage controls the number of charge carriers in this layer. This allows researchers to explore by operating high-purity MOSFETs at  temperatures.

In 1978, the researchers Jun-ichi Wakabayashi and Shinji Kawaji observed the  in experiments carried out on the inversion layer of MOSFETs. In 1980,, working at the high magnetic field laboratory in Grenoble with silicon-based MOSFET samples developed by and Gerhard Dorda, made the unexpected discovery of the.

Gate material
The primary criterion for the gate material is that it is a good. Highly doped is an acceptable but certainly not ideal conductor, and also suffers from some more technical deficiencies in its role as the standard gate material. Nevertheless, there are several reasons favoring use of polysilicon:


 * 1) The  (and consequently the drain to source on-current) is modified by the  difference between the gate material and channel material. Because polysilicon is a semiconductor, its work function can be modulated by adjusting the type and level of doping. Furthermore, because polysilicon has the same  as the underlying silicon channel, it is quite straightforward to tune the work function to achieve low threshold voltages for both NMOS and PMOS devices. By contrast, the work functions of metals are not easily modulated, so tuning the  to obtain s (LVT) becomes a significant challenge. Additionally, obtaining low-threshold devices on both PMOS and NMOS devices sometimes requires the use of different metals for each device type. While bimetallic integrated circuits (i.e., one type of metal for gate electrodes of NFETS and a second type of metal for gate electrodes of PFETS) are not common, they are known in patent literature and provide some benefit in terms of tuning electrical circuits' overall electrical performance.
 * 2) The silicon-SiO2 interface has been well studied and is known to have relatively few defects. By contrast many metal-insulator interfaces contain significant levels of defects which can lead to, charging, or other phenomena that ultimately degrade device performance.
 * 3) In the MOSFET  process, it is preferable to deposit the gate material prior to certain high-temperature steps in order to make better-performing transistors. Such high temperature steps would melt some metals, limiting the types of metal that can be used in a metal-gate-based process.

While polysilicon gates have been the de facto standard for the last twenty years, they do have some disadvantages which have led to their likely future replacement by metal gates. These disadvantages include:


 * Polysilicon is not a great conductor (approximately 1000 times more resistive than metals) which reduces the signal propagation speed through the material. The resistivity can be lowered by increasing the level of doping, but even highly doped polysilicon is not as conductive as most metals. To improve conductivity further, sometimes a high-temperature metal such as, , , and more recently is alloyed with the top layers of the polysilicon. Such a blended material is called . The silicide-polysilicon combination has better electrical properties than polysilicon alone and still does not melt in subsequent processing. Also the threshold voltage is not significantly higher than with polysilicon alone, because the silicide material is not near the channel. The process in which silicide is formed on both the gate electrode and the source and drain regions is sometimes called , self-aligned silicide.
 * When the transistors are extremely scaled down, it is necessary to make the gate dielectric layer very thin, around 1 nm in state-of-the-art technologies. A phenomenon observed here is the so-called, where a depletion layer is formed in the gate polysilicon layer next to the gate dielectric when the transistor is in the inversion. To avoid this problem, a metal gate is desired. A variety of metal gates such as , tungsten, , and are used, usually in conjunction with s. An alternative is to use fully silicided polysilicon gates, a process known as.

Present high performance CPUs use metal gate technology, together with s, a combination known as high-κ, metal gate (HKMG). The disadvantages of metal gates are overcome by a few techniques:


 * 1) The threshold voltage is tuned by including a thin "work function metal" layer between the high-κ dielectric and the main metal. This layer is thin enough that the total work function of the gate is influenced by both the main metal and thin metal work functions (either due to alloying during annealing, or simply due to the incomplete screening by the thin metal). The threshold voltage thus can be tuned by the thickness of the thin metal layer.
 * 2) High-κ dielectrics are now well studied, and their defects are understood.
 * 3) HKMG processes exist that do not require the metals to experience high temperature anneals; other processes select metals that can survive the annealing step.

Insulator
As devices are made smaller, insulating layers are made thinner, often through steps of or localised oxidation of silicon. For nano-scaled devices, at some point of carriers through the insulator from the channel to the gate electrode takes place. To reduce the resulting current, the insulator can be made thinner by choosing a material with a higher dielectric constant. To see how thickness and dielectric constant are related, note that connects field to charge as:


 * $$Q = \kappa \epsilon_0 E, $$

with Q = charge density, κ = dielectric constant, ε0 = permittivity of empty space and E = electric field. From this law it appears the same charge can be maintained in the channel at a lower field provided κ is increased. The voltage on the gate is given by:


 * $$V_\text{G} = V_\text{ch} + E\, t_\text{ins} = V_\text{ch} + \frac{Q t_\text{ins}}{\kappa \epsilon_0}, $$

with VG = gate voltage, Vch = voltage at channel side of insulator, and tins = insulator thickness. This equation shows the gate voltage will not increase when the insulator thickness increases, provided κ increases to keep tins / κ = constant (see the article on high-κ dielectrics for more detail, and the section in this article on ).

The insulator in a MOSFET is a dielectric which can in any event be silicon oxide, formed by but many other dielectric materials are employed. The generic term for the dielectric is gate dielectric since the dielectric lies directly below the gate electrode and above the channel of the MOSFET.

Junction design
The source-to-body and drain-to-body are the object of much attention because of three major factors: their design affects the  of the device, lowering output resistance, and also the speed of the device through the loading effect of the junction s, and finally, the component of stand-by power dissipation due to junction leakage.

The drain induced barrier lowering of the threshold voltage and effects upon I-V curves are reduced by using shallow junction extensions. In addition, halo doping can be used, that is, the addition of very thin heavily doped regions of the same doping type as the body tight against the junction walls to limit the extent of s.

The capacitive effects are limited by using raised source and drain geometries that make most of the contact area border thick dielectric instead of silicon.

These various features of junction design are shown (with ) in the figure.

Scaling
Over the past decades, the MOSFET (as used for digital logic) has continually been scaled down in size; typical MOSFET channel lengths were once several s, but modern integrated circuits are incorporating MOSFETs with channel lengths of tens of nanometers. 's work on was pivotal in recognising that this ongoing reduction was possible. The semiconductor industry maintains a "roadmap", the,  which sets the pace for MOSFET development. Historically, the difficulties with decreasing the size of the MOSFET have been associated with the semiconductor device fabrication process, the need to use very low voltages, and with poorer electrical performance necessitating circuit redesign and innovation (small MOSFETs exhibit higher leakage currents and lower output resistance). As of 2019, the smallest MOSFETs in production are  s, manufactured by  and.

Smaller MOSFETs are desirable for several reasons. The main reason to make transistors smaller is to pack more and more devices in a given chip area. This results in a chip with the same functionality in a smaller area, or chips with more functionality in the same area. Since fabrication costs for a are relatively fixed, the cost per integrated circuits is mainly related to the number of chips that can be produced per wafer. Hence, smaller ICs allow more chips per wafer, reducing the price per chip. In fact, over the past 30 years the number of transistors per chip has been doubled every 2–3 years once a new technology node is introduced. For example, the number of MOSFETs in a microprocessor fabricated in a technology can well be twice as many as in a  chip. This doubling of transistor density was first observed by in 1965 and is commonly referred to as. It is also expected that smaller transistors switch faster. For example, one approach to size reduction is a scaling of the MOSFET that requires all device dimensions to reduce proportionally. The main device dimensions are the channel length, channel width, and oxide thickness. When they are scaled down by equal factors, the transistor channel resistance does not change, while gate capacitance is cut by that factor. Hence, the of the transistor scales with a similar factor. While this has been traditionally the case for the older technologies, for the state-of-the-art MOSFETs reduction of the transistor dimensions does not necessarily translate to higher chip speed because the delay due to interconnections is more significant.

Producing MOSFETs with channel lengths much smaller than a is a challenge, and the difficulties of semiconductor device fabrication are always a limiting factor in advancing integrated circuit technology. Though processes such as have improved fabrication for small components, the small size of the MOSFET (less than a few tens of nanometers) has created operational problems:


 * Higher subthreshold conduction: As MOSFET geometries shrink, the voltage that can be applied to the gate must be reduced to maintain reliability. To maintain performance, the threshold voltage of the MOSFET has to be reduced as well. As threshold voltage is reduced, the transistor cannot be switched from complete turn-off to complete turn-on with the limited voltage swing available; the circuit design is a compromise between strong current in the on case and low current in the off case, and the application determines whether to favor one over the other. Subthreshold leakage (including subthreshold conduction, gate-oxide leakage and reverse-biased junction leakage), which was ignored in the past, now can consume upwards of half of the total power consumption of modern high-performance VLSI chips.
 * Increased gate-oxide leakage: The gate oxide, which serves as insulator between the gate and channel, should be made as thin as possible to increase the channel conductivity and performance when the transistor is on and to reduce subthreshold leakage when the transistor is off. However, with current gate oxides with a thickness of around 1.2 (which in silicon is ~5 s thick) the  phenomenon of  occurs between the gate and channel, leading to increased power consumption.  has traditionally been used as the gate insulator.  Silicon dioxide however has a modest dielectric constant. Increasing the dielectric constant of the gate dielectric allows a thicker layer while maintaining a high capacitance (capacitance is proportional to dielectric constant and inversely proportional to dielectric thickness). All else equal, a higher dielectric thickness reduces the  current through the dielectric between the gate and the channel. Insulators that have a larger  than silicon dioxide (referred to as s), such as group IVb metal silicates e.g.  and  silicates and oxides are being used to reduce the gate leakage from the 45 nanometer technology node onwards. On the other hand, the barrier height of the new gate insulator is an important consideration; the difference in  energy between the semiconductor and the dielectric (and the corresponding difference in  energy) also affects leakage current level. For the traditional gate oxide, silicon dioxide, the former barrier is approximately 8 . For many alternative dielectrics the value is significantly lower, tending to increase the tunneling current, somewhat negating the advantage of higher dielectric constant. The maximum gate–source voltage is determined by the strength of the electric field able to be sustained by the gate dielectric before significant leakage occurs. As the insulating dielectric is made thinner, the electric field strength within it goes up for a fixed voltage. This necessitates using lower voltages with the thinner dielectric.
 * Increased junction leakage: To make devices smaller, junction design has become more complex, leading to higher levels, shallower junctions, "halo" doping and so forth, all to decrease drain-induced barrier lowering (see the section on ). To keep these complex junctions in place, the annealing steps formerly used to remove damage and electrically active defects must be curtailed increasing junction leakage. Heavier doping is also associated with thinner depletion layers and more recombination centers that result in increased leakage current, even without lattice damage.
 * (DIBL) and VT roll off: Because of the, channel formation is not entirely done by the gate, but now the drain and source also affect the channel formation. As the channel length decreases, the depletion regions of the source and drain come closer together and make the threshold voltage (VT) a function of the length of the channel. This is called VT roll-off. VT also becomes function of drain to source voltage VDS. As we increase the VDS, the depletion regions increase in size, and a considerable amount of charge is depleted by the VDS. The gate voltage required to form the channel is then lowered, and thus, the VT decreases with an increase in VDS. This effect is called drain induced barrier lowering (DIBL).
 * Lower output resistance: For analog operation, good gain requires a high MOSFET output impedance, which is to say, the MOSFET current should vary only slightly with the applied drain-to-source voltage. As devices are made smaller, the influence of the drain competes more successfully with that of the gate due to the growing proximity of these two electrodes, increasing the sensitivity of the MOSFET current to the drain voltage. To counteract the resulting decrease in output resistance, circuits are made more complex, either by requiring more devices, for example the and s, or by feedback circuitry using, for example a circuit like that in the adjacent figure.
 * Lower transconductance: The of the MOSFET decides its gain and is proportional to hole or  (depending on device type), at least for low drain voltages. As MOSFET size is reduced, the fields in the channel increase and the dopant impurity levels increase. Both changes reduce the carrier mobility, and hence the transconductance. As channel lengths are reduced without proportional reduction in drain voltage, raising the electric field in the channel, the result is velocity saturation of the carriers, limiting the current and the transconductance.
 * Interconnect capacitance: Traditionally, switching time was roughly proportional to the gate capacitance of gates. However, with transistors becoming smaller and more transistors being placed on the chip, (the capacitance of the metal-layer connections between different parts of the chip) is becoming a large percentage of capacitance. Signals have to travel through the interconnect, which leads to increased delay and lower performance.
 * Heat production: The ever-increasing density of MOSFETs on an integrated circuit creates problems of substantial localized heat generation that can impair circuit operation. Circuits operate more slowly at high temperatures, and have reduced reliability and shorter lifetimes. Heat sinks and other cooling devices and methods are now required for many integrated circuits including microprocessors. s are at risk of . As their on-state resistance rises with temperature, if the load is approximately a constant-current load then the power loss rises correspondingly, generating further heat. When the is not able to keep the temperature low enough, the junction temperature may rise quickly and uncontrollably, resulting in destruction of the device.
 * Process variations: With MOSFETs becoming smaller, the number of atoms in the silicon that produce many of the transistor's properties is becoming fewer, with the result that control of dopant numbers and placement is more erratic. During chip manufacturing, random process variations affect all transistor dimensions: length, width, junction depths, oxide thickness etc., and become a greater percentage of overall transistor size as the transistor shrinks. The transistor characteristics become less certain, more statistical. The random nature of manufacture means we do not know which particular example MOSFETs actually will end up in a particular instance of the circuit. This uncertainty forces a less optimal design because the design must work for a great variety of possible component MOSFETs. See, , , and.
 * Modeling challenges: Modern ICs are computer-simulated with the goal of obtaining working circuits from the very first manufactured lot. As devices are miniaturized, the complexity of the processing makes it difficult to predict exactly what the final devices look like, and modeling of physical processes becomes more challenging as well. In addition, microscopic variations in structure due simply to the probabilistic nature of atomic processes require statistical (not just deterministic) predictions. These factors combine to make adequate simulation and "right the first time" manufacture difficult.

A related scaling rule is. In 2004, Phil Edholm observed that the of s (including the ) is doubling every 18 months. Over the course of several decades, the bandwidths of has risen from  to. The rapid rise in bandwidth is largely due to the same MOSFET scaling that enables Moore's law, as telecommunication networks are built from MOSFETs.